00001 /* ES40 emulator. 00002 * Copyright (C) 2007-2008 by the ES40 Emulator Project 00003 * 00004 * WWW : http://sourceforge.net/projects/es40 00005 * E-mail : camiel@camicom.com 00006 * 00007 * This file is based upon NetBsd. 00008 * 00009 * Copyright (c) 1997 Manuel Bouyer. All rights reserved. 00010 * 00011 * Modification to match BSD/OS 3.0 MII interface by Jason R. Thorpe, 00012 * Numerical Aerospace Simulation Facility, NASA Ames Research Center. 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * 1. Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * 2. Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in the 00021 * documentation and/or other materials provided with the distribution. 00022 * 3. All advertising materials mentioning features or use of this software 00023 * must display the following acknowledgement: 00024 * This product includes software developed by Manuel Bouyer. 00025 * 4. The name of the author may not be used to endorse or promote products 00026 * derived from this software without specific prior written permission. 00027 * 00028 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 00029 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 00030 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 00031 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 00033 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 00034 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 00035 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00036 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 00037 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00038 */ 00039 00055 #ifndef _DEV_MII_MII_H_ 00056 #define _DEV_MII_MII_H_ 00057 00058 /* 00059 * Registers common to all PHYs. 00060 */ 00061 #define MII_NPHY 32 /* max # of PHYs per MII */ 00062 00063 /* 00064 * MII commands, used if a device must drive the MII lines 00065 * manually. 00066 */ 00067 #define MII_COMMAND_START 0x01 00068 #define MII_COMMAND_READ 0x02 00069 #define MII_COMMAND_WRITE 0x01 00070 #define MII_COMMAND_ACK 0x02 00071 00072 #define MII_BMCR 0x00 /* Basic mode control register (rw) */ 00073 #define BMCR_RESET 0x8000 /* reset */ 00074 #define BMCR_LOOP 0x4000 /* loopback */ 00075 #define BMCR_SPEED0 0x2000 /* speed selection (LSB) */ 00076 #define BMCR_AUTOEN 0x1000 /* autonegotiation enable */ 00077 #define BMCR_PDOWN 0x0800 /* power down */ 00078 #define BMCR_ISO 0x0400 /* isolate */ 00079 #define BMCR_STARTNEG 0x0200 /* restart autonegotiation */ 00080 #define BMCR_FDX 0x0100 /* Set duplex mode */ 00081 #define BMCR_CTEST 0x0080 /* collision test */ 00082 #define BMCR_SPEED1 0x0040 /* speed selection (MSB) */ 00083 00084 #define BMCR_S10 0x0000 /* 10 Mb/s */ 00085 #define BMCR_S100 BMCR_SPEED0 /* 100 Mb/s */ 00086 #define BMCR_S1000 BMCR_SPEED1 /* 1000 Mb/s */ 00087 00088 #define BMCR_SPEED(x) ((x) & (BMCR_SPEED0 | BMCR_SPEED1)) 00089 #define MII_BMSR 0x01 /* Basic mode status register (ro) */ 00090 #define BMSR_100T4 0x8000 /* 100 base T4 capable */ 00091 #define BMSR_100TXFDX 0x4000 /* 100 base Tx full duplex capable */ 00092 #define BMSR_100TXHDX 0x2000 /* 100 base Tx half duplex capable */ 00093 #define BMSR_10TFDX 0x1000 /* 10 base T full duplex capable */ 00094 #define BMSR_10THDX 0x0800 /* 10 base T half duplex capable */ 00095 #define BMSR_100T2FDX 0x0400 /* 100 base T2 full duplex capable */ 00096 #define BMSR_100T2HDX 0x0200 /* 100 base T2 half duplex capable */ 00097 #define BMSR_EXTSTAT 0x0100 /* Extended status in register 15 */ 00098 #define BMSR_MFPS 0x0040 /* MII Frame Preamble Suppression */ 00099 #define BMSR_ACOMP 0x0020 /* Autonegotiation complete */ 00100 #define BMSR_RFAULT 0x0010 /* Link partner fault */ 00101 #define BMSR_ANEG 0x0008 /* Autonegotiation capable */ 00102 #define BMSR_LINK 0x0004 /* Link status */ 00103 #define BMSR_JABBER 0x0002 /* Jabber detected */ 00104 #define BMSR_EXTCAP 0x0001 /* Extended capability */ 00105 00106 /* 00107 * Note that the EXTSTAT bit indicates that there is extended status 00108 * info available in register 15, but 802.3 section 22.2.4.3 also 00109 * states that that all 1000 Mb/s capable PHYs will set this bit to 1. 00110 */ 00111 #define BMSR_MEDIAMASK (BMSR_100T4 | BMSR_100TXFDX | BMSR_100TXHDX | \ 00112 BMSR_10TFDX | BMSR_10THDX | BMSR_100T2FDX | \ 00113 BMSR_100T2HDX) 00114 00115 /* 00116 * Convert BMSR media capabilities to ANAR bits for autonegotiation. 00117 * Note the shift chopps off the BMSR_ANEG bit. 00118 */ 00119 #define BMSR_MEDIA_TO_ANAR(x) (((x) & BMSR_MEDIAMASK) >> 6) 00120 #define MII_PHYIDR1 0x02 /* ID register 1 (ro) */ 00121 00122 #define MII_PHYIDR2 0x03 /* ID register 2 (ro) */ 00123 #define IDR2_OUILSB 0xfc00 /* OUI LSB */ 00124 #define IDR2_MODEL 0x03f0 /* vendor model */ 00125 #define IDR2_REV 0x000f /* vendor revision */ 00126 00127 #define MII_ANAR 0x04 /* Autonegotiation advertisement (rw) */ 00128 00129 /* section 28.2.4.1 and 37.2.6.1 */ 00130 #define ANAR_NP 0x8000 /* Next page (ro) */ 00131 #define ANAR_ACK 0x4000 /* link partner abilities acknowledged (ro) */ 00132 #define ANAR_RF 0x2000 /* remote fault (ro) */ 00133 #define ANAR_FC 0x0400 /* local device supports PAUSE */ 00134 #define ANAR_T4 0x0200 /* local device supports 100bT4 */ 00135 #define ANAR_TX_FD 0x0100 /* local device supports 100bTx FD */ 00136 #define ANAR_TX 0x0080 /* local device supports 100bTx */ 00137 #define ANAR_10_FD 0x0040 /* local device supports 10bT FD */ 00138 #define ANAR_10 0x0020 /* local device supports 10bT */ 00139 #define ANAR_CSMA 0x0001 /* protocol selector CSMA/CD */ 00140 00141 #define ANAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */ 00142 #define ANAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */ 00143 #define ANAR_X_PAUSE_NONE (0 << 10) 00144 #define ANAR_X_PAUSE_SYM (1 << 10) 00145 #define ANAR_X_PAUSE_ASYM (2 << 10) 00146 #define ANAR_X_PAUSE_TOWARDS (3 << 10) 00147 #define MII_ANLPAR 0x05 /* Autonegotiation lnk partner abilities (rw) */ 00148 00149 /* section 28.2.4.1 and 37.2.6.1 */ 00150 #define ANLPAR_NP 0x8000 /* Next page (ro) */ 00151 #define ANLPAR_ACK 0x4000 /* link partner accepted ACK (ro) */ 00152 #define ANLPAR_RF 0x2000 /* remote fault (ro) */ 00153 #define ANLPAR_FC 0x0400 /* link partner supports PAUSE */ 00154 #define ANLPAR_T4 0x0200 /* link partner supports 100bT4 */ 00155 #define ANLPAR_TX_FD 0x0100 /* link partner supports 100bTx FD */ 00156 #define ANLPAR_TX 0x0080 /* link partner supports 100bTx */ 00157 #define ANLPAR_10_FD 0x0040 /* link partner supports 10bT FD */ 00158 #define ANLPAR_10 0x0020 /* link partner supports 10bT */ 00159 #define ANLPAR_CSMA 0x0001 /* protocol selector CSMA/CD */ 00160 00161 #define ANLPAR_X_FD 0x0020 /* local device supports 1000BASE-X FD */ 00162 #define ANLPAR_X_HD 0x0040 /* local device supports 1000BASE-X HD */ 00163 #define ANLPAR_X_PAUSE_MASK (3 << 10) 00164 #define ANLPAR_X_PAUSE_NONE (0 << 10) 00165 #define ANLPAR_X_PAUSE_SYM (1 << 10) 00166 #define ANLPAR_X_PAUSE_ASYM (2 << 10) 00167 #define ANLPAR_X_PAUSE_TOWARDS (3 << 10) 00168 #define MII_ANER 0x06 /* Autonegotiation expansion (ro) */ 00169 00170 /* section 28.2.4.1 and 37.2.6.1 */ 00171 #define ANER_MLF 0x0010 /* multiple link detection fault */ 00172 #define ANER_LPNP 0x0008 /* link parter next page-able */ 00173 #define ANER_NP 0x0004 /* next page-able */ 00174 #define ANER_PAGE_RX 0x0002 /* Page received */ 00175 #define ANER_LPAN 0x0001 /* link parter autoneg-able */ 00176 00177 #define MII_ANNP 0x07 /* Autonegotiation next page */ 00178 00179 /* section 28.2.4.1 and 37.2.6.1 */ 00180 #define MII_ANLPRNP 0x08 /* Autonegotiation link partner rx next page */ 00181 00182 /* section 32.5.1 and 37.2.6.1 */ 00183 00184 /* This is also the 1000baseT control register */ 00185 #define MII_100T2CR 0x09 /* 100base-T2 control register */ 00186 #define GTCR_TEST_MASK 0xe000 /* see 802.3ab ss. 40.6.1.1.2 */ 00187 #define GTCR_MAN_MS 0x1000 /* enable manual master/slave control */ 00188 #define GTCR_ADV_MS 0x0800 /* 1 = adv. master, 0 = adv. slave */ 00189 #define GTCR_PORT_TYPE 0x0400 /* 1 = DCE, 0 = DTE (NIC) */ 00190 #define GTCR_ADV_1000TFDX 0x0200 /* adv. 1000baseT FDX */ 00191 #define GTCR_ADV_1000THDX 0x0100 /* adv. 1000baseT HDX */ 00192 00193 /* This is also the 1000baseT status register */ 00194 #define MII_100T2SR 0x0a /* 100base-T2 status register */ 00195 #define GTSR_MAN_MS_FLT 0x8000 /* master/slave config fault */ 00196 #define GTSR_MS_RES 0x4000 /* result: 1 = master, 0 = slave */ 00197 #define GTSR_LRS 0x2000 /* local rx status, 1 = ok */ 00198 #define GTSR_RRS 0x1000 /* remove rx status, 1 = ok */ 00199 #define GTSR_LP_1000TFDX 0x0800 /* link partner 1000baseT FDX capable */ 00200 #define GTSR_LP_1000THDX 0x0400 /* link partner 1000baseT HDX capable */ 00201 #define GTSR_LP_ASM_DIR 0x0200 /* link partner asym. pause dir. capable */ 00202 #define GTSR_IDLE_ERR 0x00ff /* IDLE error count */ 00203 00204 #define MII_EXTSR 0x0f /* Extended status register */ 00205 #define EXTSR_1000XFDX 0x8000 /* 1000X full-duplex capable */ 00206 #define EXTSR_1000XHDX 0x4000 /* 1000X half-duplex capable */ 00207 #define EXTSR_1000TFDX 0x2000 /* 1000T full-duplex capable */ 00208 #define EXTSR_1000THDX 0x1000 /* 1000T half-duplex capable */ 00209 00210 #define EXTSR_MEDIAMASK (EXTSR_1000XFDX | EXTSR_1000XHDX | EXTSR_1000TFDX | EXTSR_1000THDX) 00211 #endif /* _DEV_MII_MII_H_ */