Sym53C810.h

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00001 /* ES40 emulator.
00002  * Copyright (C) 2007-2008 by the ES40 Emulator Project
00003  *
00004  * WWW    : http://sourceforge.net/projects/es40
00005  * E-mail : camiel@camicom.com
00006  * 
00007  * This program is free software; you can redistribute it and/or
00008  * modify it under the terms of the GNU General Public License
00009  * as published by the Free Software Foundation; either version 2
00010  * of the License, or (at your option) any later version.
00011  * 
00012  * This program is distributed in the hope that it will be useful,
00013  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00014  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015  * GNU General Public License for more details.
00016  * 
00017  * You should have received a copy of the GNU General Public License
00018  * along with this program; if not, write to the Free Software
00019  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
00020  * 
00021  * Although this is not required, the author would appreciate being notified of, 
00022  * and receiving any modifications you may make to the source code that might serve
00023  * the general public.
00024  */
00025 
00054 #if !defined(INCLUDED_SYM53C810_H_)
00055 #define INCLUDED_SYM53C810_H_
00056 
00057 #include "DiskController.h"
00058 #include "SCSIDevice.h"
00059 
00072 class CSym53C810 : public CDiskController, public CSCSIDevice, public Poco::Runnable
00073 {
00074   public:
00075     virtual int   SaveState(FILE* f);
00076     virtual int   RestoreState(FILE* f);
00077     virtual void  check_state();
00078 
00079     virtual void  run();  // Poco Thread entry point
00080     virtual void  init();
00081     virtual void  start_threads();
00082     virtual void  stop_threads();
00083 
00084     virtual void  WriteMem_Bar(int func, int bar, u32 address, int dsize,
00085                                u32 data);
00086     virtual u32   ReadMem_Bar(int func, int bar, u32 address, int dsize);
00087 
00088     virtual u32   config_read_custom(int func, u32 address, int dsize, u32 data);
00089     virtual void  config_write_custom(int func, u32 address, int dsize,
00090                                       u32 old_data, u32 new_data, u32 data);
00091 
00092     virtual void  register_disk(class CDisk* dsk, int bus, int dev);
00093 
00094     CSym53C810(CConfigurator* cfg, class CSystem* c, int pcibus, int pcidev);
00095     virtual       ~CSym53C810();
00096   private:
00097     void  write_b_scntl0(u8 value);
00098     void  write_b_scntl1(u8 value);
00099     void  write_b_istat(u8 value);
00100     u8    read_b_ctest2();
00101     void  write_b_ctest3(u8 value);
00102     void  write_b_ctest4(u8 value);
00103     void  write_b_ctest5(u8 value);
00104     void  write_b_stest2(u8 value);
00105     void  write_b_stest3(u8 value);
00106     u8    read_b_dstat();
00107     u8    read_b_sist(int id);
00108     void  write_b_dcntl(u8 value);
00109 
00110     void  post_dsp_write();
00111 
00112     int check_phase(int chk_phase);
00113     void execute_io_op();
00114     void execute_rw_op();
00115     void execute_ls_op();
00116     void execute_mm_op();
00117     void execute_tc_op();
00118     void execute_bm_op();
00119     void  execute();
00120 
00121     void  eval_interrupts();
00122     void  set_interrupt(int reg, u8 interrupt);
00123     void  chip_reset();
00124 
00125     Poco::Thread * myThread;
00126     Poco::Semaphore mySemaphore;
00127     CMutex*         myRegLock;
00128     bool            StopThread;
00129 
00131     struct SSym_state
00132     {
00133       bool  irq_asserted;
00134 
00135       union USym_regs
00136       {
00137         u8  reg8[128];
00138         u16 reg16[64];
00139         u32 reg32[64];
00140       } regs;
00141 
00142       struct SSym_alu
00143       {
00144         bool  carry;
00145       } alu;
00146 
00147       u8    ram[4096];
00148 
00149       bool  executing;
00150 
00151       bool  wait_reselect;
00152       bool  select_timeout;
00153       int   disconnected;
00154       u32   wait_jump;
00155 
00156       u8    dstat_stack;
00157       u8    sist0_stack;
00158       u8    sist1_stack;
00159 
00160       long  gen_timer;
00161 
00162       //int phase;
00163     } state;
00164 };
00165 #endif // !defined(INCLUDED_SYM_H)

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