System.h

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#include "SystemComponent.h"
#include "TraceEngine.h"

#if !defined(INCLUDED_SYSTEM_H)
#define INCLUDED_SYSTEM_H

#define MAX_COMPONENTS  100

#if defined(PROFILE)
#define PROFILE_FROM      U64(0x8000)
#define PROFILE_TO        U64(0x1a81c0)
#define PROFILE_AFTER     U64(0x200000)
#define PROFILE_BUCKSIZE  16
#define PROFILE_LENGTH    (PROFILE_TO - PROFILE_FROM)
#define PROFILE_INSTS     (PROFILE_LENGTH / 4)
#define PROFILE_BUCKETS   (PROFILE_INSTS / PROFILE_BUCKSIZE)
#define PROFILE_YN(a) \
    ((a >= PROFILE_FROM) && (a < PROFILE_TO) && profile_started)
#define PROFILE_BUCKET(a) \
  profile_buckets[(a - PROFILE_FROM) / 4 / PROFILE_BUCKSIZE]
#define PROFILE_DO(a)                    \
  if((a & (~U64(0x3))) >= PROFILE_AFTER) \
    profile_started = true;              \
  if(PROFILE_YN(a))                      \
  {                                      \
    PROFILE_BUCKET(a)++;                 \
    profiled_insts++;                    \
  }

extern u64    profile_buckets[PROFILE_BUCKETS];
extern u64    profiled_insts;
extern bool   profile_started;
#endif
#if defined(LS_MASTER) || defined(LS_SLAVE)
extern char*  dbg_strptr;
#endif

struct SMemoryUser
{
  CSystemComponent*   component;  
  int                 index;      
  u64                 base;       
  u64                 length;     
};

struct SConfig
{
  char*   key;    
  char*   value;  
};

class CSystem
{
  public:
    void          DumpMemory(unsigned int filenum);
    char*         PtrToMem(u64 address);
    unsigned int  get_memory_bits();
    void          RestoreState(const char* fn);
    void          SaveState(const char* fn);
    u64           PCI_Phys(int pcibus, u32 address);
    u64           PCI_Phys_direct_mapped(u32 address, u64 wsm, u64 tba);
    u64           PCI_Phys_scatter_gather(u32 address, u64 wsm, u64 tba);
    void          interrupt(int number, bool assert);
    int           LoadROM();
    u64           ReadMem(u64 address, int dsize, CSystemComponent* source);
    void          WriteMem(u64 address, int dsize, u64 data,
                           CSystemComponent*  source);
    void          Run();
    int           SingleStep();

    void          init();
    void          start_threads();
    void          stop_threads();

    int           RegisterMemory(CSystemComponent*  component, int index,
                                 u64 base, u64 length);
    int           RegisterComponent(CSystemComponent* component);
    int           RegisterCPU(class CAlphaCPU* cpu);

    CSystem(CConfigurator* cfg);
    void          ResetMem(unsigned int membits);

    CAlphaCPU*    get_cpu(int cpunum) { return acCPUs[cpunum]; };
    int           get_cpu_num()       { return iNumCPUs; };

    virtual       ~CSystem();
    unsigned int  iNumMemoryBits;

    void          panic(char* message, int flags);

#define PANIC_NOSHUTDOWN  0
#define PANIC_SHUTDOWN    1
#define PANIC_ASKSHUTDOWN 2
#define PANIC_LISTING     4
    void          clear_clock_int(int ProcNum);
    u64           get_c_misc();
    u64           get_c_dir(int ProcNum);
    u64           get_c_dim(int ProcNum);
    void          set_c_dim(int ProcNum, u64 value);

    void          cpu_lock(int cpuid, u64 address);
    bool          cpu_unlock(int cpuid);
    void          cpu_break_lock(int cpuid, CSystemComponent* source);
  private:
    u64           cchip_csr_read(u32 address, CSystemComponent* source);
    void          cchip_csr_write(u32 address, u64 data, CSystemComponent*  source);
    u64           pchip_csr_read(int num, u32 address);
    void          pchip_csr_write(int num, u32 address, u64 data);
    u8            dchip_csr_read(u32 address);
    void          dchip_csr_write(u32 address, u8 data);
    u8            tig_read(u32 address);
    void          tig_write(u32 address, u8 data);

    int           iNumCPUs;
    CFastMutex*   cpu_lock_mutex;

    struct SSys_state
    {
      int cpu_lock_flags;
      u64 cpu_lock_address[4];

      struct SSys_tig
      {
        u8  FwWrite;
        u8  HaltA;
        u8  HaltB;
      } tig;

      struct SSys_cchip
      {

        u64 dim[4];

        u64 drir;

        u64 misc;
        u64 csc;
      } cchip;

      struct SSys_dchip
      {
        u8  drev;
        u8  dsc;
        u8  dsc2;
        u8  str;
      } dchip;

      struct SSys_pchip
      {
        u64 plat;
        u64 perr;
        u64 perrmask;
        u64 pctl;
        u64 wsba[4];
        u64 wsm[4];
        u64 tba[4];
      } pchip[2];

      u32 cf8_address[2];
    } state;
    void*                 memory;

    //    void * memmap;
    int                   iNumComponents;
    CSystemComponent*     acComponents[MAX_COMPONENTS];
    int                   iNumMemories;
    struct SMemoryUser*   asMemories[MAX_COMPONENTS];

    class CAlphaCPU*      acCPUs[4];

    CConfigurator*        myCfg;

    int                   iSingleStep;

#if defined(IDB)
    int                   iSSCycles;
#endif
};

inline u64 CSystem::get_c_misc()
{
  return state.cchip.misc;
}

inline u64 CSystem::get_c_dir(int ProcNum)
{
  return state.cchip.drir & state.cchip.dim[ProcNum];
}

inline u64 CSystem::get_c_dim(int ProcNum)
{
  return state.cchip.dim[ProcNum];
}

inline void CSystem::set_c_dim(int ProcNum, u64 value)
{
  state.cchip.dim[ProcNum] = value;
}

extern CSystem*   theSystem;

/* constants for P-Chip CSR's */
#define PCI_PCTL_HOLE       U64(0x0000000000000020) /* <5>     */
#define PCI_PCTL_HOLE_START 0x00080000
#define PCI_PCTL_HOLE_END   0x000fffff

/* constants for pci-to-phys-address-mapping */
#define PCI_WSM_MASK      U64(0x00000000fff00000)   /* <31:20> */
#define PCI_ADD_MASK      U64(0x00000000000fffff)   /* <19:0>  */
#define PCI_TBA_MASK      U64(0x00000007fff00000)   /* <34:20> */
#define PCI_PTE_ADD_MASK  U64(0x00000000000fe000)   /* <19:13> */
#define PCI_PTE_ADD_SHIFT 10
#define PCI_PTE_TBA_MASK  U64(0x00000007fffffc00)   /* <34:10> */
#define PCI_PTE_MASK      U64(0x00000007ffffe000)   /* <34:13> */
#define PCI_PTE_SHIFT     12
#define PCI_PTE_ADD2_MASK U64(0x0000000000001fff)   /* <12:0>  */
#define PCI_PTE_PEER_BIT  U64(0x0000000090000000)   /* <31,28> */

#define PHYS_PIO_ACCESS   U64(0x0000080000000000)   /* <43>    */
#endif // !defined(INCLUDED_SYSTEM_H)

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