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00135 #if defined(IDB)
00136 extern const char* PAL_NAME[];
00137 extern const char* IPR_NAME[];
00138
00139 extern char dbg_string[1000];
00140 #if !defined(LS_MASTER) && !defined(LS_SLAVE)
00141 extern char* dbg_strptr;
00142 #endif
00143 void handle_debug_string(char* s);
00144
00145 #define TRC_(down, up, x, y) \
00146 if(bTrace) \
00147 trc->trace(this, state.current_pc, state.pc, down, up, x, y);
00148
00149 #define TRC(down, up) \
00150 if(bTrace) \
00151 trc->trace(this, state.current_pc, state.pc, down, up, (char*) 0, 0);
00152
00153 #define TRC_BR if(bTrace) \
00154 trc->trace_br(this, state.current_pc, state.pc);
00155
00156 #define GO_PAL(offset) \
00157 { \
00158 if(bDisassemble) \
00159 { \
00160 sprintf(dbg_strptr, " ==> PAL %x!\n", offset); \
00161 dbg_strptr += strlen(dbg_strptr); \
00162 } \
00163 handle_debug_string(dbg_string); \
00164 state.exc_addr = state.current_pc; \
00165 set_pc(state.pal_base | offset | 1); \
00166 if((offset == DTBM_SINGLE || offset == ITB_MISS) && bTrace) \
00167 trc->set_waitfor(this, state.exc_addr &~U64(0x3)); \
00168 else \
00169 TRC_(true, false, "GO_PAL %04x", offset); \
00170 }
00171
00172 #else
00173 #define TRC_(down, up, x, y) ;
00174 #define TRC(down, up) ;
00175 #define TRC_BR ;
00176
00177 #define GO_PAL(offset) \
00178 { \
00179 state.exc_addr = state.current_pc; \
00180 set_pc(state.pal_base | offset | 1); \
00181 }
00182 #endif
00183 #if defined(IDB)
00184 #define DEBUG_XX if(trc->get_fnc_name(this, state.current_pc &~U64(0x3), &funcname)) \
00185 { \
00186 if(bListing && !strcmp(funcname, "")) \
00187 { \
00188 printf("%08"LL "x: \"%s\"\n", state.current_pc, \
00189 cSystem->PtrToMem(state.current_pc)); \
00190 state.pc = \
00191 ( \
00192 state.current_pc + \
00193 strlen(cSystem->PtrToMem(state.current_pc)) + \
00194 4 \
00195 ) &~U64(0x3); \
00196 while(state.pc < 0x600000 && cSystem->ReadMem(state.pc, 32, this) == 0) \
00197 state.pc += 4; \
00198 return; \
00199 } \
00200 else if(bListing && !strcmp(funcname, "!SKIP")) \
00201 { \
00202 while(state.pc < 0x600000 && cSystem->ReadMem(state.pc, 32, this) == 0) \
00203 state.pc += 4; \
00204 return; \
00205 } \
00206 else if(bListing && !strncmp(funcname, "!CHAR-", 6)) \
00207 { \
00208 u64 xx_upto; \
00209 int xx_result; \
00210 xx_result = sscanf(&(funcname[6]), "%"LL "x", &xx_upto); \
00211 if(xx_result == 1) \
00212 { \
00213 state.pc = state.current_pc; \
00214 while(state.pc < xx_upto) \
00215 { \
00216 printf("%08"LL "x: \"%s\"\n", state.pc, cSystem->PtrToMem(state.pc)); \
00217 state.pc += strlen(cSystem->PtrToMem(state.pc)); \
00218 while(state.pc < xx_upto && cSystem->ReadMem(state.pc, 8, this) == 0) \
00219 state.pc++; \
00220 } \
00221 return; \
00222 } \
00223 } \
00224 else if(bListing && !strncmp(funcname, "!LCHAR-", 7)) \
00225 { \
00226 char stringval[300]; \
00227 int stringlen; \
00228 u64 xx_upto; \
00229 int xx_result; \
00230 xx_result = sscanf(&(funcname[7]), "%"LL "x", &xx_upto); \
00231 if(xx_result == 1) \
00232 { \
00233 state.pc = state.current_pc; \
00234 while(state.pc < xx_upto) \
00235 { \
00236 stringlen = (int) cSystem->ReadMem(state.pc++, 8, this); \
00237 memset(stringval, 0, 300); \
00238 strncpy(stringval, cSystem->PtrToMem(state.pc), stringlen); \
00239 printf("%08"LL "x: \"%s\"\n", state.pc - 1, stringval); \
00240 state.pc += stringlen; \
00241 while(state.pc < xx_upto && cSystem->ReadMem(state.pc, 8, this) == 0) \
00242 state.pc++; \
00243 } \
00244 return; \
00245 } \
00246 } \
00247 else if(bListing && !strncmp(funcname, "!X64-", 5)) \
00248 { \
00249 printf("\n%s:\n", &(funcname[5])); \
00250 state.pc = state.current_pc; \
00251 while \
00252 ( \
00253 (state.pc == state.current_pc) \
00254 || !trc->get_fnc_name(this, state.pc, &funcname) \
00255 ) \
00256 { \
00257 printf("%08"LL "x: %016"LL "x\n", state.pc, \
00258 cSystem->ReadMem(state.pc, 64, this)); \
00259 state.pc += 8; \
00260 } \
00261 return; \
00262 } \
00263 else if(bListing && !strncmp(funcname, "!X32-", 5)) \
00264 { \
00265 printf("\n%s:\n", &(funcname[5])); \
00266 state.pc = state.current_pc; \
00267 while \
00268 ( \
00269 (state.pc == state.current_pc) \
00270 || !trc->get_fnc_name(this, state.pc, &funcname) \
00271 ) \
00272 { \
00273 printf("%08"LL "x: %08"LL "x\n", state.pc, \
00274 cSystem->ReadMem(state.pc, 32, this)); \
00275 state.pc += 4; \
00276 } \
00277 return; \
00278 } \
00279 else if(!strncmp(funcname, ":", 1)) \
00280 { \
00281 sprintf(dbg_strptr, "%s:\n", funcname); \
00282 dbg_strptr += strlen(dbg_strptr); \
00283 } \
00284 else \
00285 { \
00286 sprintf(dbg_strptr, "\n%s:\n", funcname); \
00287 dbg_strptr += strlen(dbg_strptr); \
00288 } \
00289 } \
00290 sprintf(dbg_strptr, bListing ? "%08"LL "x: " : "%016"LL "x", state.current_pc); \
00291 dbg_strptr += strlen(dbg_strptr); \
00292 if(!bListing) \
00293 sprintf(dbg_strptr, "(%08"LL "x): ", current_pc_physical); \
00294 else \
00295 { \
00296 sprintf(dbg_strptr, "%08x %c%c%c%c: ", ins, printable((char) (ins)), \
00297 printable((char) (ins >> 8)), printable((char) (ins >> 16)), \
00298 printable((char) (ins >> 24))); \
00299 } \
00300 dbg_strptr += strlen(dbg_strptr);
00301
00302 #define UNKNOWN1 if(bDisassemble) \
00303 { \
00304 DEBUG_XX \
00305 } \
00306 sprintf(dbg_strptr, "Unknown opcode: %02x ", opcode); \
00307 dbg_strptr += strlen(dbg_strptr); \
00308 handle_debug_string(dbg_string); \
00309 return;
00310
00311 #define UNKNOWN2 if(bDisassemble) \
00312 { \
00313 DEBUG_XX \
00314 } \
00315 sprintf(dbg_strptr, "Unknown opcode: %02x.%02x ", opcode, function); \
00316 dbg_strptr += strlen(dbg_strptr); \
00317 handle_debug_string(dbg_string); \
00318 return;
00319
00320 #define POST_X64(a) \
00321 if(bDisassemble) \
00322 { \
00323 if(!bListing) \
00324 { \
00325 sprintf(dbg_strptr, " ==> %"LL "x", a); \
00326 dbg_strptr += strlen(dbg_strptr); \
00327 } \
00328 }
00329
00330 #define PRE_PAL(mnemonic) \
00331 if(bDisassemble) \
00332 { \
00333 DEBUG_XX; \
00334 if(function < 0x40 || (function > 0x7f && function < 0xc0)) \
00335 sprintf(dbg_strptr, #mnemonic " %s", PAL_NAME[function]); \
00336 else \
00337 sprintf(dbg_strptr, #mnemonic " ?%x?", function); \
00338 dbg_strptr += strlen(dbg_strptr); \
00339 }
00340
00341 #define POST_PAL TRC(1, 0);
00342
00343 #define PRE_BR(mnemonic) \
00344 if(bDisassemble) \
00345 { \
00346 u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \
00347 DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \
00348 dbg_strptr += strlen(dbg_strptr); \
00349 if(trc->get_fnc_name(this, dbg_x, &funcname)) \
00350 sprintf(dbg_strptr, "%s", funcname); \
00351 else \
00352 sprintf(dbg_strptr, "%"LL "x", dbg_x); \
00353 dbg_strptr += strlen(dbg_strptr); \
00354 }
00355
00356 #define POST_BR TRC_BR;
00357
00358 #define PRE_COND(mnemonic) \
00359 if(bDisassemble) \
00360 { \
00361 u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \
00362 DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \
00363 dbg_strptr += strlen(dbg_strptr); \
00364 if(trc->get_fnc_name(this, dbg_x, &funcname)) \
00365 sprintf(dbg_strptr, "%s", funcname); \
00366 else \
00367 sprintf(dbg_strptr, "%"LL "x", dbg_x); \
00368 dbg_strptr += strlen(dbg_strptr); \
00369 if(!bListing) \
00370 { \
00371 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_1]); \
00372 dbg_strptr += strlen(dbg_strptr); \
00373 } \
00374 }
00375
00376 #define POST_COND TRC_BR;
00377
00378 #define PRE_FCOND(mnemonic) \
00379 if(bDisassemble) \
00380 { \
00381 u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \
00382 DEBUG_XX sprintf(dbg_strptr, #mnemonic " f%d, ", FREG_1); \
00383 dbg_strptr += strlen(dbg_strptr); \
00384 if(trc->get_fnc_name(this, dbg_x, &funcname)) \
00385 sprintf(dbg_strptr, "%s", funcname); \
00386 else \
00387 sprintf(dbg_strptr, "%"LL "x", dbg_x); \
00388 dbg_strptr += strlen(dbg_strptr); \
00389 if(!bListing) \
00390 { \
00391 sprintf(dbg_strptr, ": (%"LL "x)", state.f[FREG_1]); \
00392 dbg_strptr += strlen(dbg_strptr); \
00393 } \
00394 }
00395
00396 #define POST_FCOND TRC_BR;
00397
00398 #define PRE_BSR(mnemonic) \
00399 if(bDisassemble) \
00400 { \
00401 u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \
00402 DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \
00403 dbg_strptr += strlen(dbg_strptr); \
00404 if(trc->get_fnc_name(this, dbg_x, &funcname)) \
00405 sprintf(dbg_strptr, "%s", funcname); \
00406 else \
00407 sprintf(dbg_strptr, "%"LL "x", dbg_x); \
00408 dbg_strptr += strlen(dbg_strptr); \
00409 }
00410
00411 #define POST_BSR if(REG_1 == 31) \
00412 { \
00413 TRC(0, 1); \
00414 } \
00415 else \
00416 { \
00417 TRC(1, 1); \
00418 }
00419
00420 #define PRE_JMP(mnemonic) \
00421 if(bDisassemble) \
00422 { \
00423 DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, r%d", REG_1 & 31, REG_2 & 31); \
00424 dbg_strptr += strlen(dbg_strptr); \
00425 if(!bListing) \
00426 { \
00427 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \
00428 dbg_strptr += strlen(dbg_strptr); \
00429 } \
00430 }
00431
00432 #define POST_JMP if(REG_1 == 31) \
00433 { \
00434 TRC(0, 1); \
00435 } \
00436 else \
00437 { \
00438 TRC(1, 1); \
00439 }
00440
00441 #define PRE_RET(mnemonic) \
00442 if(bDisassemble) \
00443 { \
00444 DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d", REG_2 & 31); \
00445 dbg_strptr += strlen(dbg_strptr); \
00446 if(!bListing) \
00447 { \
00448 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \
00449 dbg_strptr += strlen(dbg_strptr); \
00450 } \
00451 }
00452
00453 #define POST_RET TRC(0, 1);
00454
00455 #define PRE_MFPR(mnemonic) \
00456 if(bDisassemble) \
00457 { \
00458 DEBUG_XX; \
00459 sprintf(dbg_strptr, #mnemonic " r%d, %s", REG_1 & 31, IPR_NAME[function]); \
00460 dbg_strptr += strlen(dbg_strptr); \
00461 }
00462
00463 #define POST_MFPR POST_X64(state.r[REG_1]);
00464
00465 #define PRE_MTPR(mnemonic) \
00466 if(bDisassemble) \
00467 { \
00468 DEBUG_XX; \
00469 sprintf(dbg_strptr, #mnemonic " r%d, %s", REG_2 & 31, IPR_NAME[function]); \
00470 dbg_strptr += strlen(dbg_strptr); \
00471 }
00472
00473 #define POST_MTPR POST_X64(state.r[REG_2]);
00474
00475 #define PRE_NOP(mnemonic) \
00476 if(bDisassemble) \
00477 { \
00478 DEBUG_XX; \
00479 sprintf(dbg_strptr, #mnemonic ""); \
00480 dbg_strptr += strlen(dbg_strptr); \
00481 }
00482
00483 #define POST_NOP ;
00484
00485 #define PRE_MEM(mnemonic) \
00486 if(bDisassemble) \
00487 { \
00488 DEBUG_XX; \
00489 sprintf(dbg_strptr, #mnemonic " r%d, %04xH(r%d)", REG_1 & 31, (u32) DISP_16, \
00490 REG_2 & 31); \
00491 dbg_strptr += strlen(dbg_strptr); \
00492 if(!bListing) \
00493 { \
00494 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \
00495 dbg_strptr += strlen(dbg_strptr); \
00496 } \
00497 }
00498
00499 #define POST_MEM POST_X64(state.r[REG_1]);
00500
00501 #define PRE_R12_R3(mnemonic) \
00502 if(bDisassemble) \
00503 { \
00504 DEBUG_XX; \
00505 sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \
00506 dbg_strptr += strlen(dbg_strptr); \
00507 if(ins & 0x1000) \
00508 sprintf(dbg_strptr, "%02xH", V_2); \
00509 else \
00510 sprintf(dbg_strptr, "r%d", REG_2 & 31); \
00511 dbg_strptr += strlen(dbg_strptr); \
00512 sprintf(dbg_strptr, ", r%d", REG_3 & 31); \
00513 dbg_strptr += strlen(dbg_strptr); \
00514 if(!bListing) \
00515 { \
00516 sprintf(dbg_strptr, ": (%"LL "x,%"LL "x)", state.r[REG_1], V_2); \
00517 dbg_strptr += strlen(dbg_strptr); \
00518 } \
00519 }
00520
00521 #define POST_R12_R3 POST_X64(state.r[REG_3]);
00522
00523
00524
00525
00526 #define PRE_F12_F3(mnemonic) \
00527 if(bDisassemble) \
00528 { \
00529 DEBUG_XX; \
00530 sprintf(dbg_strptr, #mnemonic " f%d, f%d, f%d", FREG_1, FREG_2, FREG_3); \
00531 dbg_strptr += strlen(dbg_strptr); \
00532 if(!bListing) \
00533 { \
00534 sprintf(dbg_strptr, ": (%"LL "x,%"LL "x)", state.f[FREG_1], \
00535 state.f[FREG_2]); \
00536 dbg_strptr += strlen(dbg_strptr); \
00537 } \
00538 }
00539
00540
00541
00542 #define POST_F12_F3 POST_X64(state.f[FREG_3]);
00543
00544 #define PRE_R1_F3(mnemonic) \
00545 if(bDisassemble) \
00546 { \
00547 DEBUG_XX; \
00548 sprintf(dbg_strptr, #mnemonic " r%d, f%d ", REG_1 & 31, FREG_3); \
00549 dbg_strptr += strlen(dbg_strptr); \
00550 if(!bListing) \
00551 { \
00552 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_1]); \
00553 dbg_strptr += strlen(dbg_strptr); \
00554 } \
00555 }
00556
00557 #define POST_R1_F3 POST_X64(state.f[FREG_3]);
00558
00559 #define PRE_F1_R3(mnemonic) \
00560 if(bDisassemble) \
00561 { \
00562 DEBUG_XX; \
00563 sprintf(dbg_strptr, #mnemonic " f%d, r%d ", FREG_1, REG_3 & 31); \
00564 dbg_strptr += strlen(dbg_strptr); \
00565 if(!bListing) \
00566 { \
00567 sprintf(dbg_strptr, ": (%"LL "x)", state.f[FREG_1]); \
00568 dbg_strptr += strlen(dbg_strptr); \
00569 } \
00570 }
00571
00572 #define POST_F1_R3 POST_X64(state.r[REG_3]);
00573
00574 #define PRE_X_F1(mnemonic) \
00575 if(bDisassemble) \
00576 { \
00577 DEBUG_XX; \
00578 sprintf(dbg_strptr, #mnemonic " f%d ", FREG_1 & 31); \
00579 dbg_strptr += strlen(dbg_strptr); \
00580 }
00581
00582 #define POST_X_F1 POST_X64(state.f[FREG_1]);
00583
00584 #define PRE_R2_R3(mnemonic) \
00585 if(bDisassemble) \
00586 { \
00587 DEBUG_XX; \
00588 sprintf(dbg_strptr, #mnemonic " "); \
00589 dbg_strptr += strlen(dbg_strptr); \
00590 if(ins & 0x1000) \
00591 sprintf(dbg_strptr, "%02xH", V_2); \
00592 else \
00593 sprintf(dbg_strptr, "r%d", REG_2 & 31); \
00594 dbg_strptr += strlen(dbg_strptr); \
00595 sprintf(dbg_strptr, ", r%d", REG_3 & 31); \
00596 dbg_strptr += strlen(dbg_strptr); \
00597 if(!bListing) \
00598 { \
00599 sprintf(dbg_strptr, ": (%"LL "x)", V_2); \
00600 dbg_strptr += strlen(dbg_strptr); \
00601 } \
00602 }
00603
00604 #define POST_R2_R3 POST_X64(state.r[REG_3]);
00605
00606 #define PRE_X_R1(mnemonic) \
00607 if(bDisassemble) \
00608 { \
00609 DEBUG_XX; \
00610 sprintf(dbg_strptr, #mnemonic " r%d", REG_1 & 31); \
00611 dbg_strptr += strlen(dbg_strptr); \
00612 }
00613
00614 #define POST_X_R1 POST_X64(state.r[REG_1]);
00615
00616 #define PRE_X_R3(mnemonic) \
00617 if(bDisassemble) \
00618 { \
00619 DEBUG_XX; \
00620 sprintf(dbg_strptr, #mnemonic " r%d", REG_3 & 31); \
00621 dbg_strptr += strlen(dbg_strptr); \
00622 }
00623
00624 #define POST_X_R3 POST_X64(state.r[REG_3]);
00625
00626 #define PRE_HW_LD(mnemonic) \
00627 if(bDisassemble) \
00628 { \
00629 DEBUG_XX; \
00630 sprintf(dbg_strptr, #mnemonic); \
00631 dbg_strptr += strlen(dbg_strptr); \
00632 switch(function &~1) \
00633 { \
00634 case 0: sprintf(dbg_strptr, "/Phys"); break; \
00635 case 2: sprintf(dbg_strptr, "/Phys/Lock"); break; \
00636 case 4: sprintf(dbg_strptr, "/Vpte"); break; \
00637 case 10: sprintf(dbg_strptr, "/Chk"); break; \
00638 case 12: sprintf(dbg_strptr, "/Alt"); break; \
00639 case 14: sprintf(dbg_strptr, "/Alt/Chk"); break; \
00640 } \
00641 dbg_strptr += strlen(dbg_strptr); \
00642 sprintf(dbg_strptr, " r%d, %04xH(r%d)", REG_1 & 31, (u32) DISP_12, REG_2 & 31); \
00643 dbg_strptr += strlen(dbg_strptr); \
00644 if(!bListing) \
00645 { \
00646 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \
00647 dbg_strptr += strlen(dbg_strptr); \
00648 } \
00649 }
00650
00651 #define POST_HW_LD POST_X64(state.r[REG_1]);
00652
00653 #define PRE_HW_ST(mnemonic) \
00654 if(bDisassemble) \
00655 { \
00656 DEBUG_XX; \
00657 sprintf(dbg_strptr, #mnemonic); \
00658 dbg_strptr += strlen(dbg_strptr); \
00659 switch(function &~1) \
00660 { \
00661 case 0: sprintf(dbg_strptr, "/Phys"); break; \
00662 case 2: sprintf(dbg_strptr, "/Phys/Cond"); break; \
00663 case 12: sprintf(dbg_strptr, "/Alt"); break; \
00664 } \
00665 dbg_strptr += strlen(dbg_strptr); \
00666 sprintf(dbg_strptr, " r%d, %04xH(r%d)", REG_1 & 31, (u32) DISP_12, REG_2 & 31); \
00667 dbg_strptr += strlen(dbg_strptr); \
00668 if(!bListing) \
00669 { \
00670 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \
00671 dbg_strptr += strlen(dbg_strptr); \
00672 } \
00673 }
00674
00675 #define POST_HW_ST POST_X64(state.r[REG_1]);
00676
00677
00678 #define PRE_FMEM(mnemonic) \
00679 if(bDisassemble) \
00680 { \
00681 DEBUG_XX; \
00682 sprintf(dbg_strptr, #mnemonic " f%d, %04xH(r%d)", FREG_1, (u32) DISP_16, \
00683 REG_2 & 31); \
00684 dbg_strptr += strlen(dbg_strptr); \
00685 if(!bListing) \
00686 { \
00687 sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \
00688 dbg_strptr += strlen(dbg_strptr); \
00689 } \
00690 }
00691
00692
00693 #define POST_FMEM POST_X64(state.f[FREG_1]);
00694
00695
00696
00697
00698 #define PRE_F2_F3(mnemonic) \
00699 if(bDisassemble) \
00700 { \
00701 DEBUG_XX; \
00702 sprintf(dbg_strptr, #mnemonic " f%d, f%d", FREG_2, FREG_3); \
00703 dbg_strptr += strlen(dbg_strptr); \
00704 if(!bListing) \
00705 { \
00706 sprintf(dbg_strptr, ": (%"LL "x)", state.f[FREG_2]); \
00707 dbg_strptr += strlen(dbg_strptr); \
00708 } \
00709 }
00710
00711
00712
00713 #define POST_F2_F3 POST_X64(state.f[FREG_3]);
00714
00715 #else
00716 #define UNKNOWN1 printf("Unknown opcode: %02x \n", opcode); \
00717 return;
00718
00719 #define UNKNOWN2 printf("Unknown opcode: %02x.%02x \n", opcode, function); \
00720 return;
00721 #endif
00722 #if defined(IDB)
00723
00724
00725
00726
00727
00728 #define OP(mnemonic, format) \
00729 PRE_##format(mnemonic); \
00730 if(!bListing) \
00731 { \
00732 DO_##mnemonic; \
00733 } POST_##format; \
00734 handle_debug_string(dbg_string); \
00735 return;
00736
00737
00738 #define OP_FNC(mnemonic, format) \
00739 PRE_##format(mnemonic); \
00740 if(!bListing) \
00741 { \
00742 mnemonic(); \
00743 } POST_##format; \
00744 handle_debug_string(dbg_string); \
00745 return;
00746
00747 #else //defined(IDB)
00748
00749
00750
00751
00752 #define OP(mnemonic, format) \
00753 DO_##mnemonic; \
00754 return;
00755
00756
00757 #define OP_FNC(mnemonic, format) \
00758 mnemonic(); \
00759 return;
00760 #endif //defined(IDB)