X-1.29 Camiel Vanderhoeven 26-MAR-2008 Fix compiler warnings.
X-1.28 Camiel Vanderhoeven 19-MAR-2008 IDB versions compileable again.
X-1.27 Camiel Vanderhoeven 13-MAR-2008 Formatting.
X-1.26 Camiel Vanderhoeven 14-MAR-2008 1. More meaningful exceptions replace throwing (int) 1. 2. U64 macro replaces X64 macro.
X-1.25 Camiel Vanderhoeven 05-MAR-2008 Multi-threading version.
X-1.24 Camiel Vanderhoeven 29-FEB-2008 Comments.
X-1.23 Brian Wheeler 29-FEB-2008 Fix IDB compilation.
X-1.22 Camiel Vanderhoeven 30-JAN-2008 Always use set_pc or add_pc to change the program counter.
X-1.21 Camiel Vanderhoeven 30-JAN-2008 Remember number of instructions left in current memory page, so that the translation-buffer doens't need to be consulted on every instruction fetch when the Icache is disabled.
X-1.20 Camiel Vanderhoeven 28-JAN-2008 Better floating-point exception handling.
X-1.19 Camiel Vanderhoeven 27-JAN-2008 Have GO_PAL throw an exception, so we don't continue doing what we were doing before the exception was taken.
X-1.18 Camiel Vanderhoeven 21-JAN-2008 Moved some macro's to cpu_defs.h.
X-1.17 Camiel Vanderhoeven 16-JAN-2008 Added ARITH_TRAP macro.
X-1.16 Camiel Vanderhoeven 2-DEC-2007 Moved PAL_NAME and IPR_NAME to AlphaCPU.cpp.
X-1.15 Camiel Vanderhoeven 10-NOV-2007 f12_f3 operations show fxx as registers instead of rxx.
X-1.14 Camiel Vanderhoeven 30-OCT-2007 IPR 0x2d identified as M_FIX (Mbox fixed behaviour)
X-1.13 Camiel Vanderhoeven 11-APR-2007 Moved all data that should be saved to a state file to a structure "state".
X-1.12 Camiel Vanderhoeven 30-MAR-2007 Added old changelog comments.
X-1.11 Camiel Vanderhoeven 14-MAR-2007 Small bugfix in DEBUG_XX macro.
X-1.10 Camiel Vanderhoeven 14-MAR-2007 Small bugfix in FP debugging macro's.
X-1.9 Camiel Vanderhoeven 13-MAR-2007 Added FP debugging macro's.
X-1.8 Camiel Vanderhoeven 12-MAR-2007 a) When an exception occurs, debugging information for the previous instruction is no longer lost. b) Made various printf-statements 64-bit safe in a neater way. (Use printf("%" LL "x",value) instead of printf("%x",(u64)value)).
X-1.7 Camiel Vanderhoeven 8-MAR-2007 Pass "this" as an argument to CTraceEngine::get_fnc_name.
X-1.6 Camiel Vanderhoeven 28-FEB-2007 a) Removed MINI_DEBUG_XX b) Debugging now writes to the char* debug_string, rather than using printf directly. This allows us to do other things with debugger output.
X-1.5 Camiel Vanderhoeven 22-FEB-2007 a) Replaced IPR macro's with separate MTPR and MFPR macro's (because these instructions use different registers). b) Made a couple of printf's multi-platform-safe.
X-1.4 Camiel Vanderhoeven 18-FEB-2007 Introduced POST_xxx and PRE_xxx macro's. When debugging, these are included from the OP macro in AlphaCPU.cpp.
X-1.3 Camiel Vanderhoeven 16-FEB-2007 a) Macro's that end CAlphaCPU::DoClock() now return 0. b) Made a couple of printf's multi-platform-safe.
X-1.2 Brian Wheeler 13-FEB-2007 Added mini-version of DEBUG_XX, that dumps all registers in a concise format.
X-1.1 Camiel Vanderhoeven 12-FEB-2007 File created. Contains code previously found in AlphaCPU.h
Definition in file cpu_debug.h.
Go to the source code of this file.
Defines | |
| #define | TRC_(down, up, x, y) |
| #define | TRC(down, up) |
| #define | TRC_BR |
| #define | GO_PAL(offset) |
| #define | DEBUG_XX |
| #define | UNKNOWN1 |
| #define | UNKNOWN2 |
| #define | POST_X64(a) |
| #define | PRE_PAL(mnemonic) |
| #define | POST_PAL TRC(1, 0); |
| #define | PRE_BR(mnemonic) |
| #define | POST_BR TRC_BR; |
| #define | PRE_COND(mnemonic) |
| #define | POST_COND TRC_BR; |
| #define | PRE_FCOND(mnemonic) |
| #define | POST_FCOND TRC_BR; |
| #define | PRE_BSR(mnemonic) |
| #define | POST_BSR |
| #define | PRE_JMP(mnemonic) |
| #define | POST_JMP |
| #define | PRE_RET(mnemonic) |
| #define | POST_RET TRC(0, 1); |
| #define | PRE_MFPR(mnemonic) |
| #define | POST_MFPR POST_X64(state.r[REG_1]); |
| #define | PRE_MTPR(mnemonic) |
| #define | POST_MTPR POST_X64(state.r[REG_2]); |
| #define | PRE_NOP(mnemonic) |
| #define | POST_NOP ; |
| #define | PRE_MEM(mnemonic) |
| #define | POST_MEM POST_X64(state.r[REG_1]); |
| #define | PRE_R12_R3(mnemonic) |
| #define | POST_R12_R3 POST_X64(state.r[REG_3]); |
| #define | PRE_F12_F3(mnemonic) |
| #define | POST_F12_F3 POST_X64(state.f[FREG_3]); |
| #define | PRE_R1_F3(mnemonic) |
| #define | POST_R1_F3 POST_X64(state.f[FREG_3]); |
| #define | PRE_F1_R3(mnemonic) |
| #define | POST_F1_R3 POST_X64(state.r[REG_3]); |
| #define | PRE_X_F1(mnemonic) |
| #define | POST_X_F1 POST_X64(state.f[FREG_1]); |
| #define | PRE_R2_R3(mnemonic) |
| #define | POST_R2_R3 POST_X64(state.r[REG_3]); |
| #define | PRE_X_R1(mnemonic) |
| #define | POST_X_R1 POST_X64(state.r[REG_1]); |
| #define | PRE_X_R3(mnemonic) |
| #define | POST_X_R3 POST_X64(state.r[REG_3]); |
| #define | PRE_HW_LD(mnemonic) |
| #define | POST_HW_LD POST_X64(state.r[REG_1]); |
| #define | PRE_HW_ST(mnemonic) |
| #define | POST_HW_ST POST_X64(state.r[REG_1]); |
| #define | PRE_FMEM(mnemonic) |
| #define | POST_FMEM POST_X64(state.f[FREG_1]); |
| #define | PRE_F2_F3(mnemonic) |
| #define | POST_F2_F3 POST_X64(state.f[FREG_3]); |
| #define | OP(mnemonic, format) |
| #define | OP_FNC(mnemonic, format) |
Functions | |
| void | handle_debug_string (char *s) |
| Do whatever needs to be done to a debug-string. | |
Variables | |
| const char * | PAL_NAME [] |
| const char * | IPR_NAME [] |
| char | dbg_string [1000] |
| #define DEBUG_XX |
Definition at line 184 of file cpu_debug.h.
| #define GO_PAL | ( | offset | ) |
Value:
{ \
if(bDisassemble) \
{ \
sprintf(dbg_strptr, " ==> PAL %x!\n", offset); \
dbg_strptr += strlen(dbg_strptr); \
} \
handle_debug_string(dbg_string); \
state.exc_addr = state.current_pc; \
set_pc(state.pal_base | offset | 1); \
if((offset == DTBM_SINGLE || offset == ITB_MISS) && bTrace) \
trc->set_waitfor(this, state.exc_addr &~U64(0x3)); \
else \
TRC_(true, false, "GO_PAL %04x", offset); \
}
Definition at line 156 of file cpu_debug.h.
Referenced by CAlphaCPU::execute().
| #define OP | ( | mnemonic, | |||
| format | ) |
Value:
PRE_##format(mnemonic); \ if(!bListing) \ { \ DO_##mnemonic; \ } POST_##format; \ handle_debug_string(dbg_string); \ return;
Definition at line 728 of file cpu_debug.h.
Referenced by CAlphaCPU::execute().
| #define OP_FNC | ( | mnemonic, | |||
| format | ) |
Value:
PRE_##format(mnemonic); \ if(!bListing) \ { \ mnemonic(); \ } POST_##format; \ handle_debug_string(dbg_string); \ return;
Definition at line 738 of file cpu_debug.h.
| #define POST_BR TRC_BR; |
Definition at line 356 of file cpu_debug.h.
| #define POST_BSR |
Value:
Definition at line 411 of file cpu_debug.h.
| #define POST_COND TRC_BR; |
Definition at line 376 of file cpu_debug.h.
| #define POST_F12_F3 POST_X64(state.f[FREG_3]); |
Definition at line 542 of file cpu_debug.h.
| #define POST_F1_R3 POST_X64(state.r[REG_3]); |
Definition at line 572 of file cpu_debug.h.
| #define POST_F2_F3 POST_X64(state.f[FREG_3]); |
Definition at line 713 of file cpu_debug.h.
| #define POST_FCOND TRC_BR; |
Definition at line 396 of file cpu_debug.h.
| #define POST_FMEM POST_X64(state.f[FREG_1]); |
Definition at line 693 of file cpu_debug.h.
| #define POST_HW_LD POST_X64(state.r[REG_1]); |
Definition at line 651 of file cpu_debug.h.
| #define POST_HW_ST POST_X64(state.r[REG_1]); |
Definition at line 675 of file cpu_debug.h.
| #define POST_JMP |
Value:
Definition at line 432 of file cpu_debug.h.
| #define POST_MEM POST_X64(state.r[REG_1]); |
Definition at line 499 of file cpu_debug.h.
| #define POST_MFPR POST_X64(state.r[REG_1]); |
Definition at line 463 of file cpu_debug.h.
| #define POST_MTPR POST_X64(state.r[REG_2]); |
Definition at line 473 of file cpu_debug.h.
| #define POST_NOP ; |
Definition at line 483 of file cpu_debug.h.
| #define POST_PAL TRC(1, 0); |
Definition at line 341 of file cpu_debug.h.
| #define POST_R12_R3 POST_X64(state.r[REG_3]); |
Definition at line 521 of file cpu_debug.h.
| #define POST_R1_F3 POST_X64(state.f[FREG_3]); |
Definition at line 557 of file cpu_debug.h.
| #define POST_R2_R3 POST_X64(state.r[REG_3]); |
Definition at line 604 of file cpu_debug.h.
| #define POST_RET TRC(0, 1); |
Definition at line 453 of file cpu_debug.h.
| #define POST_X64 | ( | a | ) |
Value:
if(bDisassemble) \ { \ if(!bListing) \ { \ sprintf(dbg_strptr, " ==> %"LL "x", a); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 320 of file cpu_debug.h.
| #define POST_X_F1 POST_X64(state.f[FREG_1]); |
Definition at line 582 of file cpu_debug.h.
| #define POST_X_R1 POST_X64(state.r[REG_1]); |
Definition at line 614 of file cpu_debug.h.
| #define POST_X_R3 POST_X64(state.r[REG_3]); |
Definition at line 624 of file cpu_debug.h.
| #define PRE_BR | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \ DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(trc->get_fnc_name(this, dbg_x, &funcname)) \ sprintf(dbg_strptr, "%s", funcname); \ else \ sprintf(dbg_strptr, "%"LL "x", dbg_x); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 343 of file cpu_debug.h.
| #define PRE_BSR | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \ DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(trc->get_fnc_name(this, dbg_x, &funcname)) \ sprintf(dbg_strptr, "%s", funcname); \ else \ sprintf(dbg_strptr, "%"LL "x", dbg_x); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 398 of file cpu_debug.h.
| #define PRE_COND | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \ DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(trc->get_fnc_name(this, dbg_x, &funcname)) \ sprintf(dbg_strptr, "%s", funcname); \ else \ sprintf(dbg_strptr, "%"LL "x", dbg_x); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_1]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 358 of file cpu_debug.h.
| #define PRE_F12_F3 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " f%d, f%d, f%d", FREG_1, FREG_2, FREG_3); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x,%"LL "x)", state.f[FREG_1], \ state.f[FREG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 526 of file cpu_debug.h.
| #define PRE_F1_R3 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " f%d, r%d ", FREG_1, REG_3 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.f[FREG_1]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 559 of file cpu_debug.h.
| #define PRE_F2_F3 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " f%d, f%d", FREG_2, FREG_3); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.f[FREG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 698 of file cpu_debug.h.
| #define PRE_FCOND | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ u64 dbg_x = (state.current_pc + 4 + (DISP_21 * 4)) &~U64(0x3); \ DEBUG_XX sprintf(dbg_strptr, #mnemonic " f%d, ", FREG_1); \ dbg_strptr += strlen(dbg_strptr); \ if(trc->get_fnc_name(this, dbg_x, &funcname)) \ sprintf(dbg_strptr, "%s", funcname); \ else \ sprintf(dbg_strptr, "%"LL "x", dbg_x); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.f[FREG_1]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 378 of file cpu_debug.h.
| #define PRE_FMEM | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " f%d, %04xH(r%d)", FREG_1, (u32) DISP_16, \ REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 678 of file cpu_debug.h.
| #define PRE_HW_LD | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic); \ dbg_strptr += strlen(dbg_strptr); \ switch(function &~1) \ { \ case 0: sprintf(dbg_strptr, "/Phys"); break; \ case 2: sprintf(dbg_strptr, "/Phys/Lock"); break; \ case 4: sprintf(dbg_strptr, "/Vpte"); break; \ case 10: sprintf(dbg_strptr, "/Chk"); break; \ case 12: sprintf(dbg_strptr, "/Alt"); break; \ case 14: sprintf(dbg_strptr, "/Alt/Chk"); break; \ } \ dbg_strptr += strlen(dbg_strptr); \ sprintf(dbg_strptr, " r%d, %04xH(r%d)", REG_1 & 31, (u32) DISP_12, REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 626 of file cpu_debug.h.
| #define PRE_HW_ST | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic); \ dbg_strptr += strlen(dbg_strptr); \ switch(function &~1) \ { \ case 0: sprintf(dbg_strptr, "/Phys"); break; \ case 2: sprintf(dbg_strptr, "/Phys/Cond"); break; \ case 12: sprintf(dbg_strptr, "/Alt"); break; \ } \ dbg_strptr += strlen(dbg_strptr); \ sprintf(dbg_strptr, " r%d, %04xH(r%d)", REG_1 & 31, (u32) DISP_12, REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 653 of file cpu_debug.h.
| #define PRE_JMP | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d, r%d", REG_1 & 31, REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 420 of file cpu_debug.h.
| #define PRE_MEM | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " r%d, %04xH(r%d)", REG_1 & 31, (u32) DISP_16, \ REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 485 of file cpu_debug.h.
| #define PRE_MFPR | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " r%d, %s", REG_1 & 31, IPR_NAME[function]); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 455 of file cpu_debug.h.
| #define PRE_MTPR | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " r%d, %s", REG_2 & 31, IPR_NAME[function]); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 465 of file cpu_debug.h.
| #define PRE_NOP | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic ""); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 475 of file cpu_debug.h.
| #define PRE_PAL | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ if(function < 0x40 || (function > 0x7f && function < 0xc0)) \ sprintf(dbg_strptr, #mnemonic " %s", PAL_NAME[function]); \ else \ sprintf(dbg_strptr, #mnemonic " ?%x?", function); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 330 of file cpu_debug.h.
| #define PRE_R12_R3 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " r%d, ", REG_1 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(ins & 0x1000) \ sprintf(dbg_strptr, "%02xH", V_2); \ else \ sprintf(dbg_strptr, "r%d", REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ sprintf(dbg_strptr, ", r%d", REG_3 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x,%"LL "x)", state.r[REG_1], V_2); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 501 of file cpu_debug.h.
| #define PRE_R1_F3 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " r%d, f%d ", REG_1 & 31, FREG_3); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_1]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 544 of file cpu_debug.h.
| #define PRE_R2_R3 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " "); \ dbg_strptr += strlen(dbg_strptr); \ if(ins & 0x1000) \ sprintf(dbg_strptr, "%02xH", V_2); \ else \ sprintf(dbg_strptr, "r%d", REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ sprintf(dbg_strptr, ", r%d", REG_3 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", V_2); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 584 of file cpu_debug.h.
| #define PRE_RET | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX sprintf(dbg_strptr, #mnemonic " r%d", REG_2 & 31); \ dbg_strptr += strlen(dbg_strptr); \ if(!bListing) \ { \ sprintf(dbg_strptr, ": (%"LL "x)", state.r[REG_2]); \ dbg_strptr += strlen(dbg_strptr); \ } \ }
Definition at line 441 of file cpu_debug.h.
| #define PRE_X_F1 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " f%d ", FREG_1 & 31); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 574 of file cpu_debug.h.
| #define PRE_X_R1 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " r%d", REG_1 & 31); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 606 of file cpu_debug.h.
| #define PRE_X_R3 | ( | mnemonic | ) |
Value:
if(bDisassemble) \ { \ DEBUG_XX; \ sprintf(dbg_strptr, #mnemonic " r%d", REG_3 & 31); \ dbg_strptr += strlen(dbg_strptr); \ }
Definition at line 616 of file cpu_debug.h.
| #define TRC | ( | down, | |||
| up | ) |
Value:
Definition at line 149 of file cpu_debug.h.
| #define TRC_ | ( | down, | |||
| up, | |||||
| x, | |||||
| y | ) |
Value:
Definition at line 145 of file cpu_debug.h.
| #define TRC_BR |
Value:
Definition at line 153 of file cpu_debug.h.
| #define UNKNOWN1 |
Value:
if(bDisassemble) \ { \ DEBUG_XX \ } \ sprintf(dbg_strptr, "Unknown opcode: %02x ", opcode); \ dbg_strptr += strlen(dbg_strptr); \ handle_debug_string(dbg_string); \ return;
Definition at line 302 of file cpu_debug.h.
Referenced by CAlphaCPU::execute().
| #define UNKNOWN2 |
Value:
if(bDisassemble) \ { \ DEBUG_XX \ } \ sprintf(dbg_strptr, "Unknown opcode: %02x.%02x ", opcode, function); \ dbg_strptr += strlen(dbg_strptr); \ handle_debug_string(dbg_string); \ return;
Definition at line 311 of file cpu_debug.h.
Referenced by CAlphaCPU::execute().
| void handle_debug_string | ( | char * | s | ) |
Do whatever needs to be done to a debug-string.
Used in IDB-mode to handle the disassembly- string. In es40_idb, it is written to the standard output.
| s | Pointer to the debug string. |
Definition at line 474 of file AlphaCPU.cpp.
References dbg_strptr.
| char dbg_string[1000] |
| const char* IPR_NAME[] |
Definition at line 2118 of file AlphaCPU.cpp.
| const char* PAL_NAME[] |
Definition at line 2081 of file AlphaCPU.cpp.