ES40: C:/es40/src/cpu_fp_memory.h Source File

00001 /* ES40 emulator.
00002  * Copyright (C) 2007-2008 by the ES40 Emulator Project
00003  *
00004  * WWW    : http://sourceforge.net/projects/es40
00005  * E-mail : camiel@camicom.com
00006  * 
00007  * This program is free software; you can redistribute it and/or
00008  * modify it under the terms of the GNU General Public License
00009  * as published by the Free Software Foundation; either version 2
00010  * of the License, or (at your option) any later version.
00011  * 
00012  * This program is distributed in the hope that it will be useful,
00013  * but WITHOUT ANY WARRANTY; without even the implied warranty of
00014  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015  * GNU General Public License for more details.
00016  * 
00017  * You should have received a copy of the GNU General Public License
00018  * along with this program; if not, write to the Free Software
00019  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
00020  * 
00021  * Although this is not required, the author would appreciate being notified of, 
00022  * and receiving any modifications you may make to the source code that might serve
00023  * the general public.
00024  */
00025 
00073 #if defined(HAVE_NEW_FP)
00074 #define DO_LDF  FPSTART;                                 \
00075   if(FREG_1 != 31)                                       \
00076   {                                                      \
00077     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 3); \
00078     state.f[FREG_1] = vax_ldf((u32) READ_PHYS(32));      \
00079   }
00080 
00081 #define DO_LDG  FPSTART;                                 \
00082   if(FREG_1 != 31)                                       \
00083   {                                                      \
00084     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 7); \
00085     state.f[FREG_1] = vax_ldg(READ_PHYS(64));            \
00086   }
00087 
00088 #define DO_LDS  FPSTART;                                 \
00089   if(FREG_1 != 31)                                       \
00090   {                                                      \
00091     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 3); \
00092     state.f[FREG_1] = ieee_lds((u32) READ_PHYS(32));     \
00093   }
00094 
00095 #define DO_LDT  FPSTART;                                 \
00096   if(FREG_1 != 31)                                       \
00097   {                                                      \
00098     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 7); \
00099     state.f[FREG_1] = READ_PHYS(64);                     \
00100   }
00101 
00102 #define DO_STF  FPSTART;                                \
00103   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 3); \
00104   WRITE_PHYS(vax_stf(state.f[FREG_1]), 32);
00105 
00106 #define DO_STG  FPSTART;                                \
00107   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 7); \
00108   WRITE_PHYS(vax_stg(state.f[FREG_1]), 64);
00109 
00110 #define DO_STS  FPSTART;                                \
00111   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 3); \
00112   WRITE_PHYS(ieee_sts(state.f[FREG_1]), 32);
00113 
00114 #define DO_STT  FPSTART;                                \
00115   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 7); \
00116   WRITE_PHYS(state.f[FREG_1], 64);
00117 
00118 #else
00119 #define DO_LDF  FPSTART;                                 \
00120   if(FREG_1 != 31)                                       \
00121   {                                                      \
00122     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 3); \
00123     state.f[FREG_1] = load_f((u32) READ_PHYS(32));       \
00124   }
00125 
00126 #define DO_LDG  FPSTART;                                 \
00127   if(FREG_1 != 31)                                       \
00128   {                                                      \
00129     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 7); \
00130     state.f[FREG_1] = load_g(READ_PHYS(64));             \
00131   }
00132 
00133 #define DO_LDS  FPSTART;                                 \
00134   if(FREG_1 != 31)                                       \
00135   {                                                      \
00136     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 3); \
00137     state.f[FREG_1] = load_s((u32) READ_PHYS(32));       \
00138   }
00139 
00140 #define DO_LDT  FPSTART;                                 \
00141   if(FREG_1 != 31)                                       \
00142   {                                                      \
00143     DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_READ, 7); \
00144     state.f[FREG_1] = READ_PHYS(64);                     \
00145   }
00146 
00147 #define DO_STF  FPSTART;                                \
00148   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 3); \
00149   WRITE_PHYS(store_f(state.f[FREG_1]), 32);
00150 
00151 #define DO_STG  FPSTART;                                \
00152   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 7); \
00153   WRITE_PHYS(store_g(state.f[FREG_1]), 64);
00154 
00155 #define DO_STS  FPSTART;                                \
00156   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 3); \
00157   WRITE_PHYS(store_s(state.f[FREG_1]), 32);
00158 
00159 #define DO_STT  FPSTART;                                \
00160   DATA_PHYS(state.r[REG_2] + DISP_16, ACCESS_WRITE, 7); \
00161   WRITE_PHYS(state.f[FREG_1], 64);
00162 #endif