cpu_logical.h File Reference

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Detailed Description

Contains code macros for the processor logical instructions.

Based on ARM chapter 4.5.

Id

cpu_logical.h,v 1.6 2008/03/14 15:30:52 iamcamiel Exp

X-1.5 Camiel Vanderhoeven 14-MAR-2008 1. More meaningful exceptions replace throwing (int) 1. 2. U64 macro replaces X64 macro.

X-1.4 Camiel Vanderhoeven 11-APR-2007 Moved all data that should be saved to a state file to a structure "state".

X-1.3 Camiel Vanderhoeven 30-MAR-2007 Added old changelog comments.

X-1.2 Camiel Vanderhoeven 19-FEB-2007 Fixed a compiler-dependent bug (possible >> or <<by 64) in SRA opcode.

X-1.1 Camiel Vanderhoeven 18-FEB-2007 File created. Contains code previously found in AlphaCPU.h

Author:

Camiel Vanderhoeven (camiel@camicom.com / http://www.camicom.com)

Definition in file cpu_logical.h.

Go to the source code of this file.

Defines
#define	DO_AND   state.r[REG_3] = state.r[REG_1] & V_2;
#define	DO_BIC   state.r[REG_3] = state.r[REG_1] &~V_2;
#define	DO_BIS   state.r[REG_3] = state.r[REG_1] | V_2;
#define	DO_EQV   state.r[REG_3] = state.r[REG_1] ^ ~V_2;
#define	DO_ORNOT   state.r[REG_3] = state.r[REG_1] | ~V_2;
#define	DO_XOR   state.r[REG_3] = state.r[REG_1] ^ V_2;
#define	DO_CMOVEQ
#define	DO_CMOVGE
#define	DO_CMOVGT
#define	DO_CMOVLBC
#define	DO_CMOVLBS
#define	DO_CMOVLE
#define	DO_CMOVLT
#define	DO_CMOVNE
#define	DO_SLL   state.r[REG_3] = state.r[REG_1] << (V_2 & 63);
#define	DO_SRA
#define	DO_SRL   state.r[REG_3] = state.r[REG_1] >> (V_2 & 63);

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Define Documentation

#define DO_AND   state.r[REG_3] = state.r[REG_1] & V_2;

Definition at line 53 of file cpu_logical.h.

#define DO_BIC   state.r[REG_3] = state.r[REG_1] &~V_2;

Definition at line 54 of file cpu_logical.h.

#define DO_BIS   state.r[REG_3] = state.r[REG_1] | V_2;

Definition at line 55 of file cpu_logical.h.

#define DO_CMOVEQ

Value:

if(!state.r[REG_1]) \
    state.r[REG_3] = V_2;

Definition at line 60 of file cpu_logical.h.

#define DO_CMOVGE

Value:

if((s64) state.r[REG_1] >= 0) \
    state.r[REG_3] = V_2;

Definition at line 62 of file cpu_logical.h.

#define DO_CMOVGT

Value:

if((s64) state.r[REG_1] > 0) \
    state.r[REG_3] = V_2;

Definition at line 64 of file cpu_logical.h.

#define DO_CMOVLBC

Value:

if(!(state.r[REG_1] & U64(0x1))) \
    state.r[REG_3] = V_2;

Definition at line 66 of file cpu_logical.h.

#define DO_CMOVLBS

Value:

if(state.r[REG_1] & U64(0x1)) \
    state.r[REG_3] = V_2;

Definition at line 68 of file cpu_logical.h.

#define DO_CMOVLE

Value:

if((s64) state.r[REG_1] <= 0) \
    state.r[REG_3] = V_2;

Definition at line 70 of file cpu_logical.h.

#define DO_CMOVLT

Value:

if((s64) state.r[REG_1] < 0) \
    state.r[REG_3] = V_2;

Definition at line 72 of file cpu_logical.h.

#define DO_CMOVNE

Value:

if(state.r[REG_1]) \
    state.r[REG_3] = V_2;

Definition at line 74 of file cpu_logical.h.

#define DO_EQV   state.r[REG_3] = state.r[REG_1] ^ ~V_2;

Definition at line 56 of file cpu_logical.h.

#define DO_ORNOT   state.r[REG_3] = state.r[REG_1] | ~V_2;

Definition at line 57 of file cpu_logical.h.

#define DO_SLL   state.r[REG_3] = state.r[REG_1] << (V_2 & 63);

Definition at line 77 of file cpu_logical.h.

#define DO_SRA

Value:

state.r[REG_3] = (V_2 & 63) ?                      \
    (                                                                  \
      (state.r[REG_1] >> (V_2 & 63)) |                                 \
        ((state.r[REG_1] >> 63) ? (X64_QUAD << (64 - (V_2 & 63))) : 0) \
    ) : state.r[REG_1];

Definition at line 78 of file cpu_logical.h.

#define DO_SRL   state.r[REG_3] = state.r[REG_1] >> (V_2 & 63);

Definition at line 83 of file cpu_logical.h.

#define DO_XOR   state.r[REG_3] = state.r[REG_1] ^ V_2;

Definition at line 58 of file cpu_logical.h.