CAlphaCPU::SCPU_state::SICache Struct Reference

#include <AlphaCPU.h>

---

Detailed Description

Instruction cache entry.

An instruction cache entry contains the address and address space number (ASN) + 16 32-bit instructions. [HRM 2-11]

Definition at line 484 of file AlphaCPU.h.

Data Fields
int	asn
	Address Space Number.
u32	data [512]
	Actual cached instructions.
u64	address
	Address of first instruction.
u64	p_address
	Physical address of first instruction.
bool	asm_bit
	Address Space Match bit.
bool	valid
	Valid cache entry.

---

Field Documentation

int CAlphaCPU::SCPU_state::SICache::asn

Address Space Number.

Definition at line 486 of file AlphaCPU.h.

Referenced by CAlphaCPU::get_icache().

u32 CAlphaCPU::SCPU_state::SICache::data[512]

Actual cached instructions.

Definition at line 487 of file AlphaCPU.h.

Referenced by CAlphaCPU::get_icache().

u64 CAlphaCPU::SCPU_state::SICache::address

Address of first instruction.

Definition at line 488 of file AlphaCPU.h.

Referenced by CAlphaCPU::get_icache().

u64 CAlphaCPU::SCPU_state::SICache::p_address

Physical address of first instruction.

Definition at line 489 of file AlphaCPU.h.

Referenced by CAlphaCPU::get_icache().

bool CAlphaCPU::SCPU_state::SICache::asm_bit

Address Space Match bit.

Definition at line 490 of file AlphaCPU.h.

Referenced by CAlphaCPU::flush_icache_asm(), and CAlphaCPU::get_icache().

bool CAlphaCPU::SCPU_state::SICache::valid

Valid cache entry.

Definition at line 491 of file AlphaCPU.h.

Referenced by CAlphaCPU::flush_icache(), CAlphaCPU::flush_icache_asm(), and CAlphaCPU::get_icache().

---

The documentation for this struct was generated from the following file:

• C:/es40/src/AlphaCPU.h